Field
This disclosure relates generally to integrated circuits, and more particularly, to secure low voltage testability of integrated circuits.
Related Art
Testability of integrated circuits continues to be a significant issue, especially since complexity increases by the square for a given improvement in a linear dimension such as gate length of a transistor. If one dimension of a transistor that occupies a square decreases by 10 percent, which implies the new side is 0.9 of the original, then the area becomes 0.81 of the original area. Testing improves as a well but not by the square. Thus complexity, and thus test time, has increased at a greater rate than improvements in the speed of test equipment. Thus, the benefit of onboard testing, often called built in self test (BIST), continues to be popular. One of the areas where testing is challenging is at low voltage. Low voltage testing is important for providing margin and predicting failures. It is also important for obtaining characteristics, such as lowest voltage of operation, of an integrated circuit. Also tracking effects of a given process over time is also important at low voltage. Low voltage testing can be challenging because the integrated circuit will stop functioning properly with a sufficient drop in voltage which is a reason for the low voltage testing to be secure. It is generally undesirable to perform low voltage testing when the integrated circuit is being used in a product because it may not operate properly and cause the product to fail. Thus, the ability to prevent a user of the integrated circuit from performing low voltage operations including testing can be critical
Accordingly there is a need to provide further improvement in performing secure low voltage testability of integrated circuits.